1. Field of the Invention
The invention relates to an integrated circuit (IC) chip, and, more specifically, to an IC chip with a post-passivation metallization structure having a good ability to barrier against the entrance of metal particles in the post-passivation metallization structure into a pad exposed by a passivation layer or into a metal cap on a pad exposed by the passivation layer.
2. Brief Description of the Related Art
In a conventional process of forming a post-passivation metallization structure over a passivation layer of a wafer, an under bump metal (UBM) layer is first formed by sputtering an adhesion/barrier layer, such as titanium layer or titanium-tungsten-alloy layer, to have the post-passivation metallization structure adhere onto the wafer and to avoid an diffusion reaction between the post-passivation metallization structure and a pad exposed by an opening in the passivation layer, then sputtering a seed layer, beneficial to having a metal layer electroplated thereon, on the adhesion/barrier layer. Thereafter, a patterned photoresist layer is formed on the under bump metal (UBM) layer, an opening in the patterned photoresist layer exposing the seed layer. Next, a metal layer is electroplated on the seed layer exposed by the opening in the patterned photoresist layer.
However, the adhesion/barrier layer is not reliable enough if the following processes are performed in a high temperature. In a high temperature, gold atoms from a gold layer formed on the adhesion/barrier layer could penetrate through the adhesion/barrier layer to a pad made of aluminum exposed by an opening in a passivation layer or to a metal cap including aluminum on a pad made of copper exposed by an opening in a passivation layer. A brittle intermetallic compound (IMC), aluminum-gold alloy, could be formed, leading the post-passivation metallization structure with a bad reliability.